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Computer Aided Verification
other
Editor(s):
Nicolas Halbwachs
,
Doron Peled
Publication date
(Online):
January 14 2003
Publisher:
Springer Berlin Heidelberg
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Book
ISBN (Print):
978-3-540-66202-0
ISBN (Electronic):
978-3-540-48683-1
Publication date (Print):
1999
Publication date (Online):
January 14 2003
DOI:
10.1007/3-540-48683-6
SO-VID:
5263ded4-6a71-4369-a01d-edbadda55072
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Book chapters
pp. 8
Timed Automata
pp. 108
Test Generation Derived from Model-Checking
pp. 60
Verifying Safety Properties of a PowerPC− Microprocessor Using Symbolic Model Checking without BDDs
pp. 134
Handling Global Conditions in Parametrized System Verification
pp. 160
Experience with Predicate Abstraction
pp. 172
Model Checking of Safety Properties
pp. 222
Efficient Decision Procedures for Model Checking of Linear Time Logic Properties
pp. 249
Improved Automata Generation for Linear Temporal Logic
pp. 274
Model Checking Partial State Spaces with 3-Valued Temporal Logics
pp. 341
Efficient Timed Reachability Analysis Using Clock Difference Diagrams
pp. 443
Abstract and Model Check while You Prove
pp. 455
Deciding Equality Formulas by Small Domains Instantiations
pp. 470
Exploiting Positive Equality in a Logic of Equality with Uninterpreted Functions
pp. 495
NuSMV: A New Symbolic Model Verifier
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